Computer Busses

by Peter Bjørn Perlsø

created 12th of March, 2005 , updated 22nd of June 2007 and 30aug2009.

This article briefly explains the historical background and evolution of the Personal Computer databus systems.

bus	width (bits)	clock	theoretical peak bandwidth (MBps)	burst capable	year	comments
Industry Standard Architecture (ISA) - 8 bit	8	4.77 MHz	4.77		1981	used in PC XT
ISA - 8 bit	8	8.33 MHz	8.33
ISA - 16 bit	16	8.33 MHz	16.67		1984	used in PC AT
Micro Channel Architecture (MCA)	16, 32	10.33 MHz	up to 41.32		1987	Used exclusively in IBM's PS/2 systems - was IBM's attempt to marginalize Compaq - failed miserably because it was incompatible with the commonly used ISA. Auto-configurable (Plug-n-play!), provides bus mastering, asynchronous
EISA	32	8.33 MHz	33	yes	1988	Launched by the "Gang of Nine" consortium of computer makers (AST, Compaq, Epson, Hewlett-Packard, NEC, Olivetti, Tandy, Wyse and Zenith) as an alternative to IBM's attempt to freeze out PC clone makers by way of MCA. Auto-configurable (Plug-n-play!), provides bus mastering and divided interrupts.
NuBus	32	10 MHz	40	yes	1980's	"New Bus" - primarily used in Apple Macintoshes Auto-configurable (Plug-n-play!)

VESA Local Bus (VLB)	32	up to 40 MHz	100, 133 or 160		1992	Used with 486 boards. Ran syncronously with the CPU, ie. at 25, 33 or 40 MHz
Peripheral Component Interconnect (PCI)	32	33 MHz	132	yes	1992	developed by Intel, for use with Pentium systems. Asynchronous. Auto-configurable (Plug-n-play!)
PCI 2.1	64	66 MHz	528	yes

Accellerated Graphics Port (AGP)	32	66 MHz	264		Spring 1997	AGP 1.0, allows sideband addressing (demultiplexed (seperated) addresses from data -> faster data transfers) and AGP texturing ("direct execute mode" - system memory can be used as texture storage)
2x AGP	32	2x66 MHz	528			"
4x AGP	32	4x66 MHz	1056			AGP 2.0, allows write combining
8x AGP	32	8x66 MHz	2112			AGP 3.0

PCI-X 100	64	100 MHz	792	yes
PCI-X 133	64	133 MHz	1056	yes
PCI-X (2.0) 266	64	266 MHz	2.15 GBps	yes		2003
PCI-X (2.0) 533	64	533 MHz	4.3 GBps	yes		2003

PCI Express (PCIe) x16	2	?	up to 4 GBps	yes		250 MBps per lane, up to 16 lanes (x16), more or less mainstream in late 2006

Storage Bus Systems

bus	width (bits)	clock	peak bandwidth (MBps)	burst capable	year	comments
AT Attachment (ATA), IDE	8	4,77 MHz	8,3		1981	used in PC AT (as the name suggests)
Fast ATA (ATA-2), EIDE	8		16,7
ATAPI	8
ATA-3	16		16,7			includes ATAPI
ATA-4	16		33			UltraDMA33
ATA-5	16		66			80-conductor cables
ATA-6	16		100
ATA-7	16		133			>127 GB drive capacity

Serial ATA (SATA)	1	1.5 GHz	150
SATA-2	1	3 GHz	300			2005?
SATA 6G (SATA-3)	1	6 GHz	600			2007??

SCSI-1	8	5 MHz	5
Fast SCSI (SCSI-2)	8	10 MHz	10
Fast Wide SCSI (Wide SCSI-2)	16	10 MHz	20
Ultra SCSI (SCSI-3)	8	20 MHz	20
Ultra Wide SCSI (Wide SCSI-3)	16	20 MHz	40
Ultra-2 SCSI	8	40 MHz	40			uses LVD cabling and connectors
Ultra-2 Wide SCSI	16	40 MHz	80			"
Ultra160 SCSI	16	80 MHz	160			", (Ultra 3 Wide)
Ultra320 SCSI	16	160 MHz	320			", (Ultra 4 Wide)

NB!

The term "Ultra Fast SCSI" is misleading and should be avoided. Ultra SCSI is actually an "extra Fast" SCSI, hence don't use the "Fast" term in conjunction with any Ultra SCSI name. Avoid misleading terms such as "Ultra Fast SCSI" and "Ultra Fast SCSI-3"

Ultra-2 SCSI is sometimes mistakenly referred to as "Ultra SCSI-2". Don't make that mistake.

Low Voltage Differential (LVD) SCSI and Differental SCSI are NOT the same things! Mixing up two of these bus/cabling types can have catastrophic consequences due to different signalling tensions and methods being used - beware!

Comments:

ALL Wide SCSI variants use 68-pin connectors, and they all allow for 16 storage units per channel.

SCSI info based on my old article "SCSI Demystified! (or how I learned to rid myself of the confusion and love SCSI)", based on a draft from 1998.