RAM types

by Peter Perlsø, published 6th of March 2003, updated March 2007

A perennial work in progress...

RAM = Random Access Memory

Fact of life: Fast response memory is expensive, slower memory is cheap.

Registers - Level 0 - inside CPU, 0 CPU cycles
L1 cache - Level 1 - on CPU die, 1-2 cycles
L2 cache - Level 1 - outside or on CPU die, 5 cycles
L3 cache - Level 1 - outside CPU, 10-20 cycles
RAM/Main memory - Level 2 - 100-1000 cycles
Hard disk - Level 3 (outboard storage) - over 1e6 cycles
Tape/Backup - Level 4 (offline storage) - duh!

Cycle times, relative to bus frequency:

SIMM - Single Inline Memory Module

D (Dynamic) RAM
4 - 40 MHz, 100-150 ns access time

Requres that a signal be sent for both row and columns for each memory access.

Clock latency: 5-5-5-5

FPM (Fast Page Mode) DRAM
16-66 MHz, 60-80 ns

Allows a row to be activated and held active while multiple sequential column accesses take place for memory accesses near each other. Improves access times significantly.

Clock latency: 5-3-3-3

S (Static) RAM
Very fast RAM used in CPU buffers (caches). Does not need refresh signals, but requires more transistors (5 per data bit storage) and more power to operate).

BS (Burst Static) RAM
Also used in CPU buffers

DIMM - Dual Inline Memory Module

EDO (D) RAM - Enhanced Data Out
aka "hyper page mode" DRAM
33 - 75 MHz, 50-60 ns
invented in 1994

Allows a new memory access to start before the last memory access has finished, allowing lower latencies.

Clock latency: typically 5-2-2-2 @ 66 MHz

BEDO (Burst EDO) DRAM

Burst capable EDO RAM made possible by adding more latches and pipelining circuitry. Had a limitd success in the marketplace.

Clock latency: 5-1-1-1

S (Synchronous) DRAM
60-166 MHz, 4-12 ns (originally 8-10-12)

SDRAM runs on a clock signal synchronised with the chipset clock, unlike Async RAM where RAM and chipset run on two different clock signals. Allows a dramatic increase in bus speeds. Allows bursting. Uses internal interleaving to allow circuits to initiate an access for the first half of the chip while the second half is finishing an access.

SDRAM abolishes the use of Wait States.

PC66 - 532 MBps *
PC100 - 0.8 GBps
PC133 - 1.064 GBps (most common type)
PC166 - 1.33 GBps **

Clock latency: 5-1-1-1

V (Video) RAM

W (Window) RAM

SGRAM

RIMM - Rambus Inline Memory Module

an awfully expensive kind of RAM, on its way out due to its poor price/performance...

RD (RAMBUS Direct) RAM - 16 bit wide RAMbus

RDRAM600 - 266 MHz x 2 - 532 Mhz - 1.064 GBps
RDRAM700 - 356 MHz x 2 - 712 MHz - 1.424 GBps
RDRAM800 "PC800" - 400 MHz x 2 - 800 MHz - 1.6 GBps

RDRAM1066 "PC1066" - 533 MHz x 2 - 1066 MHz

DDR (Double Data Rate) (SD) RAM

PC1600 - 100 MHz x 2 - DDR100/200 - 1.6 GBps
PC2100 - 133 Mhz x 2 - DDR133/266 - 2.133 GBps
PC2700 - 166 MHz x 2 - DDR333 - 2.667 GBps
!PC3000 - DDR366 **
PC3200 - DDR400 (most common type) - 3.2 GBps


!PC3500 - DDR433 *
!PC3700 - DDR466 *
!PC4000 - DDR500

!PC4200 - DDR533 **
!PC4300 - DDR538? **
!PC4400 - DDR550
!PC4500 - DDR566 **
!PC4800 - DDR600 *

!) not JEDEC standardized

DDR2-SDRAM

PC2-3200 - DDR2-400 - 400 MHz - 3.2 GBps
PC2-4200 - DDR2-530 - 533 MHz (most common type) - 4.267 GBps
PC2-4300 - 538 MHz *
PC2-5300 - DDR2-667 - 667 MHz - 5.333 GBps
PC2-5400 - 675 MHz *
PC2-6400 - DDR2-800 - 800 MHz ** - 6.4 GBps

PC2-8000 - 1 GHz **
PC2-8500 - 1.066 GHz **
PC2-8888 - 1.111 GHz **
PC2-9000 - 1.120 GHz **
PC2-9200 - 1.150 GHz **
PC2-10000 - 1.25 GHz **

SLDRAM - not yet used

*) - uncommon type of RAM
**) - rare type of RAM